Icarus Verilog
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== Using Icarus Verilog ==
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=== How do I debug a Verilog design with Icarus - there is no built in waveform viewer like Mentor? ===
 
=== How do I debug a Verilog design with Icarus - there is no built in waveform viewer like Mentor? ===
   
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The home page for GTKWAVE is [http://home.nc.rr.com/gtkwave/ here],
 
The home page for GTKWAVE is [http://home.nc.rr.com/gtkwave/ here],
 
and is the place to go for the most current version.
 
and is the place to go for the most current version.
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== About The Icarus Verilog Project ==
   
 
=== How can I help? ===
 
=== How can I help? ===

Revision as of 22:39, 14 November 2006

Using Icarus Verilog

How do I debug a Verilog design with Icarus - there is no built in waveform viewer like Mentor?

Verilog has a standard dump format called VCD that is used to dump the state of the design as it simulates. Use the $dumpfile directive to create a file that contains the dump state. Use the $dumpvars directive to define the scope of the dump.

Example:

// Do this in your test bench

initial
 begin
    $dumpfile("test.vcd");
    $dumpvars(0,test);
 end

Once you have the dump file you can use a wave form viewer like GTKWAVE to look at the state.

Gracious, my VCD files are huge. Isn't there a better way?

Indeed there is. If you are using GTKWAVE for waveform display, you can dump your waves in LXT2 format. LXT2 is a compact binary format that is fast to write and fast to read. There are two ways to enable LXT2 output:

  • Set the environment variable IVERILOG_DUMPER to "lxt2", or
  • Pass the "-lxt2" flag as an extended argument to the vvp command.

Then use the GTKWAVE command to open the lxt2 file. Note that GTKWAVE generally expects that LXT2 files have the ".lxt" suffix, so you may have to change your "$dumpfile" system task call to give a file name with the right suffix.

Where do I get GTKWAVE?

GTKWAVE can be found several places - but the Icarus.com site has several versions avaiable at this ftp site.

The home page for GTKWAVE is here, and is the place to go for the most current version.

About The Icarus Verilog Project

How can I help?

Well, one obvious way is for you to contribute to this Wiki. This is the main user level documentation for the Icarus Verilog software, so improving it is bound to be valuable.

If you are skilled in Verilog but not C/C++, another useful form of contribution is bug reports and regression tests. Go to the Icarus Verilog home page and follow the links to the bug tracking database. The bug tracking database is hosted on sourceforge.net.

The regression test suite is the ivtest project, also on sourceforge. Contributions here are very helpful.

If you are skilled in C/C++, then there are several major components that are varying levels of complexity to work in, including the system task/function implementations, the vvp run time engine, the various code generators, and the compiler itself.

How can I contribute?

If your time is limited and you would rather throw money at the project, there is a donations link accessible from the Icarus Verilog home page. This link is for open-ended donations of money.

And in certain cases, if you desire a specific feature or specific form of technical support, the author, and possibly others, may be available for hire. Go to the Icarus Verilog home page and look for "Paid Technical Support."