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* [[Getting_Started|Getting Started with Icarus Verilog]] |
* [[Getting_Started|Getting Started with Icarus Verilog]] |
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* [[Simulation]] |
* [[Simulation]] |
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| + | * [[Using Xilinx Tools]] |
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* [[Using_VPI|Using VPI]] |
* [[Using_VPI|Using VPI]] |
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* [[Using_Loadable_Target_API|Using Loadable Target API]] |
* [[Using_Loadable_Target_API|Using Loadable Target API]] |
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* [[Using_VHDL_Code_Generator|Using the VHDL code generator]] |
* [[Using_VHDL_Code_Generator|Using the VHDL code generator]] |
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| − | * [[Using_The_Verilog_ |
+ | * [[Using_The_Verilog_'95_Code_Generator|Using the Verilog '95 code generator]] |
* [[Using the PCB code generator]] |
* [[Using the PCB code generator]] |
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* [[Iverilog_Flags|'''iverilog''' Command Flags/Arguments]] |
* [[Iverilog_Flags|'''iverilog''' Command Flags/Arguments]] |
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| + | * [[Iverilog_Attributes|'''iverilog''' Supported Attributes]] |
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* [[Vvp_Flags|'''vvp''' Command Flags/Arguments]] |
* [[Vvp_Flags|'''vvp''' Command Flags/Arguments]] |
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* [[Command_File_Format|Command File Format]] |
* [[Command_File_Format|Command File Format]] |
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* [[Verilog_Portability_Notes|Verilog Language Portability Notes]] |
* [[Verilog_Portability_Notes|Verilog Language Portability Notes]] |
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* [[Verilog_References|Verilog References]] |
* [[Verilog_References|Verilog References]] |
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| − | * [[ |
+ | * [[Release_Notes_Icarus_Verilog_11|Release Notes for Icarus Verilog 11.0]] |
| + | * [[Release_Notes_Icarus_Verilog_10|Release Notes for Icarus Verilog 10.0]] |
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| + | * [[Release_Notes_Icarus_Verilog_0_9_7|Release Notes for Icarus Verilog 0.9.7]] |
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== Add-on Products == |
== Add-on Products == |
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* [[GTKWAVE|GTK Wave]] |
* [[GTKWAVE|GTK Wave]] |
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| − | GTKWave is a waveform/VCD dump viewer that is well supported by Icarus Verilog. |
+ | :: GTKWave is a waveform/VCD dump viewer that is well supported by Icarus Verilog. |
* Covered |
* Covered |
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| − | Covered is a coverage analysis tool. It can be found [http://covered.sourceforge.net/ here]. |
+ | :: Covered is a coverage analysis tool. It can be found [http://covered.sourceforge.net/ here]. |
* [[SIMBUS|Simbus]] |
* [[SIMBUS|Simbus]] |
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| − | Simbus supports distributed simulations of bussed systems. |
+ | :: Simbus supports distributed simulations of bussed systems. |
| + | *[http://potentialventures.github.io/cocotb/ Cocotb] |
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| − | |||
| + | :: Cocotb uses VPI to embed the Python interpreter into the simulator and provides a Python library for accessing and assigning signal values, traversing the simulation heirarchy and writing regression tests. Documentation is available on [http://cocotb.readthedocs.org cocotb.readthedocs.org] |
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| − | *iLint |
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| − | |||
| − | This is a RTL level rule checker. It is developed as an IVL_TARGET of iVerilog. There are two releases of this. One that works with iVerilog 0.8.7 and the other which works with iVerilog 0.9.3. More details are available [http://www.dollysoft.co.in/products here] |
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Latest revision as of 12:17, 15 October 2020
This is the user guide: a collection of articles on how to use Icarus Verilog effectively. The two major parts cover working with Icarus Verilog and Icarus Verilog details. The first part contains articles that describe how and why things work, and the second part contains more advanced aspects of using Icarus Verilog. Although both sections are written in prose with examples, the second section is more detailed and presumes the basic understanding of the first part.
Working with Icarus Verilog[]
These are articles that describe in clear prose, with examples, the basics of using Icarus Verilog. Each article covers a significant aspect of using Icarus Verilog in the real world.
- Introduction to Verilog and Icarus Verilog
- Getting Started with Icarus Verilog
- Simulation
- Using Xilinx Tools
- Using VPI
- Using Loadable Target API
- Using the VHDL code generator
- Using the Verilog '95 code generator
- Using the PCB code generator
More Details[]
The links here contain more advanced information on select subjects. Read here for complete details on subjects that were introduced in the guides above.
- iverilog Command Flags/Arguments
- iverilog Supported Attributes
- vvp Command Flags/Arguments
- Command File Format
- Verilog Language Portability Notes
- Verilog References
- Release Notes for Icarus Verilog 11.0
- Release Notes for Icarus Verilog 10.0
- Release Notes for Icarus Verilog 0.9.7
Add-on Products[]
These are some add-on products and 3rd party utilities that make working with Icarus Verilog a more complete user experience.
- GTKWave is a waveform/VCD dump viewer that is well supported by Icarus Verilog.
- Covered
- Covered is a coverage analysis tool. It can be found here.
- Simbus supports distributed simulations of bussed systems.
- Cocotb uses VPI to embed the Python interpreter into the simulator and provides a Python library for accessing and assigning signal values, traversing the simulation heirarchy and writing regression tests. Documentation is available on cocotb.readthedocs.org